This month we reveal that we are working on a powerful and affordable RISC-V single board computer, discuss PineNote’s huge software improvements and provide updates on PinePhone…
Hmm, can’t claim to be an expert, but I heard the opposite. According to the article I read the original RISC-V ISA was developed by the University of California to be simple and easy to teach, but the opposite of optimized.
By now this has surely improved a lot, but most commercially available SoCs seem to include a lot of complex out of spec and proprietary extensions to get semi decent speed. And those larger Chinese server chip designs might be ok for highly parallel workloads, but are not exactly great either (like those old AMD Bulldozer chips).
Hmm, can’t claim to be an expert, but I heard the opposite. According to the article I read the original RISC-V ISA was developed by the University of California to be simple and easy to teach, but the opposite of optimized.
By now this has surely improved a lot, but most commercially available SoCs seem to include a lot of complex out of spec and proprietary extensions to get semi decent speed. And those larger Chinese server chip designs might be ok for highly parallel workloads, but are not exactly great either (like those old AMD Bulldozer chips).