an article from ars says it is the full instruction set
The resulting processor involves 5,900 individual transistors and is capable of implementing the full 32-bit version of the RISC-V instruction set, which necessarily means it includes sophisticated circuitry like the RISC-V instruction decoder.
From the paper, that’s almost a 40x improvement on comparable logic integration!
Some notes from the paper:
Transistor channel length is 3 um
Clock speed is 1 kHz
Typically this is where people like to shit on the design “cos muh GHz” etc, but tbf not only will people doubtless work on improving the clock speeds etc, but there’s plenty of applications where computation time or complexity isn’t so demanding, so i’m just excited by any breakthrough in these areas.
Exactly, I think the whole idea of using a new substrate is very interesting. It’s also going to be interesting to see if power requirements might end up being lower which could be a huge advantage as well.
if this is a full RISCV implementation in 2D materials this is a genuinely impressive breakthrough!!
an article from ars says it is the full instruction set
https://arstechnica.com/science/2025/04/researchers-build-a-risc-v-processor-using-a-2d-semiconductor/
Thanks for the reference, from there I found the very impressive original Nature paper “A RISC-V 32-bit microprocessor based on two-dimensional semiconductors” fantastic stuff!!
From the paper, that’s almost a 40x improvement on comparable logic integration!
Some notes from the paper:
Typically this is where people like to shit on the design “cos muh GHz” etc, but tbf not only will people doubtless work on improving the clock speeds etc, but there’s plenty of applications where computation time or complexity isn’t so demanding, so i’m just excited by any breakthrough in these areas.
Exactly, I think the whole idea of using a new substrate is very interesting. It’s also going to be interesting to see if power requirements might end up being lower which could be a huge advantage as well.